a) Field of the Invention
The present invention relates to a solid-state image pickup device serving as an area image sensor and a method of driving the same, and in particular, to a solid-state image pickup device of interline transfer type including a plurality of photoelectric converter columns and a plurality of vertical transfer charge-coupled devices (CCD) and a method of driving the same.
b) Description of the Related Art
After mass production techniques for CCD have been established, video cameras, electronic still cameras, and the like using a CCD-type solid-state image pickup device serving as an area image sensor are rapidly coming into wide use. The CCD-type solid-state image pickup devices are classified by structure into several kinds, for example, a solid-state image pickup device of interline transfer type (to be abbreviated as xe2x80x9cIT-CCDxe2x80x9d herebelow).
An IT-CCD includes a semiconductor substrate and a large number of photoelectric converter elements or simply photoelectric converters arranged on a surface of the substrate in columns and rows with a fixed pitch. Each of the photoelectric converter columns and rows includes a plurality of photoelectric converters. Each photoelectric converter ordinarily is a photodiode.
A photoelectric converter being composed of a pn photodiode is produced as follows. A p-type well is formed on a desired surface of, for example, a semiconductor substrate and then an n-type region having a desired contour is formed in the p-type well. When necessary, a p+-type region is formed on the n-type region. Signal charge is stored or accumulated in the n-type region. That is, the n-type region functions as a signal charge storing or accumulating region.
In this specification, a term xe2x80x9cphotoelectric converter (element)xe2x80x9d indicates only the signal charge storing region in some cases. Also, xe2x80x9cadjacent to a photoelectric converterxe2x80x9d means xe2x80x9cadjacent to a signal charge storing region constituting a photoelectric converterxe2x80x9d, and xe2x80x9ccontiguous to a photoelectric converterxe2x80x9d means xe2x80x9ccontiguous to a signal charge storing region constituting a photoelectric converterxe2x80x9d.
Adjacent to each photoelectric converter column, one charge transfer channel is formed. An IT-CCD therefore includes a plurality of charge transfer channels. Each charge transfer channel is used to transfer signal charge accumulated in each photoelectric converter of the photoelectric converter column adjacent to the charge transfer channel.
On the surface of the semiconductor substrate, a plurality of transfer electrodes is formed with an electrically insulating film therebetween. The electrodes intersect the charge transfer channels in a plan view. Each intersection between the transfer electrodes and the charge transfer channels in the plan view serves as one charge transfer stage. That is, one charge transfer channel and a plurality of charge electrodes constitute one vertical charge CCD.
In this specification, a region constituting the charge transfer stage in each transfer electrode of the vertical transfer CCD is called xe2x80x9ctransfer path forming sectionxe2x80x9d.
Each vertical transfer CCD of an IT-CCD of interlace drive type usually includes two charge transfer stages for one photoelectric converter. Each vertical transfer CCD of an IT-CCD of overall pixel readout type usually includes three or four charge transfer stages for one photoelectric converter. One IT-CCD includes vertical transfer CCDs as many as there are photoelectric converter columns formed in the IT-CCD.
Each photoelectric converter accumulates therein signal charge by achieving photoelectric conversion. The signal charge accumulated in the photoelectric converter is read out to an associated charge transfer channel at a predetermined point of time.
To control the operation to read signal charge from the photoelectric converter to the charge transfer channel, a readout gate region is formed for each photoelectric converter being contiguous thereto on the surface of the semiconductor substrate. The readout gate region is ordinarily constituted of a region of a conductivity type opposite to those of a photoelectric converter and a charge transfer channel. Each readout gate region is contiguous also to a predetermined section of a charge transfer channel corresponding to the photoelectric converter.
On each readout gate region, a readout gate electrode zone is formed. Each readout gate electrode zone is ordinarily constituted of part of a transfer path forming section of a predetermined transfer electrode constituting a vertical transfer CCD.
Signal charge read out to each charge transfer channel is transferred to an output transfer path by each vertical transfer CCD including the charge transfer channel. The output transfer path is ordinarily composed of a CCD (to be called xe2x80x9chorizontal CCDxe2x80x9d in some cases herebelow).
The output transfer path being composed of a horizontal transfer CCD includes of N charge transfer stages for one vertical transfer CCD. One charge transfer stage ordinarily includes one potential barrier region and one potential well region, and N is two. When each charge transfer stage has a uniform potential, N is three or more.
The output transfer path sequentially transfers the received signal charge in a longitudinal direction (to be referred to as xe2x80x9crow directionxe2x80x9d herebelow) of the photoelectric converter row to an output unit. Like the vertical transfer CCD, the output transfer path is formed also in the semiconductor substrate.
The vertical and horizontal transfer CCDs each have a function of photoelectric conversion like the photodiode. To prevent unnecessary photoelectric conversion in the vertical and horizontal transfer CCDs, a light shielding film is formed in an area ranging from a light sensing section with the photoelectric converters to the horizontal transfer CCD. The light shielding film has an opening of a predetermined contour on each photoelectric converter (photodiode). One opening is disposed for one photoelectric converter. The opening is ordinarily within a signal charge accumulating region of the photoelectric converter in a plan view.
One photoelectric converter, one readout gate region formed contiguous to the photoelectric converter, one readout gate electrode zone covering the readout gate region in a plan view, and two to four charge transfer stages (of the vertical transfer CCD) corresponding to the photoelectric converter constitute one pixel. In a surface of each photoelectric converter, an exposed section thereof in the opening in a plan view serves as a light receiving section of the pixel.
Therefore, in the IT-CCD, a contour in a plan view of each opening formed in the light shielding film and an area of the opening in a plan view substantially determine a contour and an area of the light receiving section of each pixel, respectively.
With development of use of the IT-CCD, improvement in performance such as resolution and sensitivity of the IT-CCD has been desired.
The resolution of the IT-CCD strongly depends on density of pixels in the IT-CCD. The resolution can be more easily increased when the pixel density becomes higher. The sensitivity of the IT-CCD strongly depends on an area of the light receiving section of each pixel. The resolution can be more easily increased when the area of each pixel becomes larger.
Japanese Patent Publication Ser. No. 2825702 describes an IT-CCD (referred to as xe2x80x9csolid-state image pickup devicexe2x80x9d in the publication and as xe2x80x9cIT-CCDxe2x80x9d in this specification). As known, by the IT-CCD, the pixel density can be increased while suppressing the reduction in the area of the light receiving section of each pixel.
The IT-CCD includes a plurality of photoelectric converters formed with a fixed pitch in columns and rows. Each of the photoelectric converter columns and rows includes a plurality of photoelectric converters. Each photoelectric converter in even photoelectric converter columns is shifted in a direction of the column relative to associated ones of said photoelectric converters of the odd photoelectric converter columns by about one half of a pitch of the photoelectric converters of each photoelectric converter column. Similarly, each photoelectric converter in even photoelectric converter rows is shifted in a direction of the row relative to associated ones of said photoelectric converters of odd photoelectric converter columns by about one half of a pitch of the photoelectric converters of each photoelectric converter row. Each photoelectric converter column includes photoelectric converters of only odd or even photoelectric converter rows.
To transfer signal charge accumulated in each photoelectric converter, one vertical transfer CCD is disposed for each photoelectric converter column adjacent thereto. Each vertical transfer CCD includes a plurality of transfer electrodes which are formed in generally a honeycomb layout. For each of a hexagonal gap or region created by arranging a plurality of transfer electrodes in a honeycomb layout, one photoelectric converter is disposed in the hexagonal region in a plan view.
Each vertical transfer CCD is used to transfer signal charge accumulated in the photoelectric converters of one photoelectric converter column adjacent to the vertical transfer CCD. Each vertical transfer CCD transfers the signal charge in a predetermined (vertical) direction through a locally meandering path.
In the IT-CCD of the Japanese Patent Publication, by disposing a large number of photoelectric converters and a plurality of transfer electrodes (a plurality of transfer electrodes for the vertical transfer CCDs) in this way, the pixel density can be increased while preventing decrease in the area of the light receiving section of each pixel.
In this specification, the arrangement of the photoelectric converters will be referred to as xe2x80x9cshifted-pixel layoutxe2x80x9d herebelow.
For example, when a 200-million-pixel IT-CCD of 1/2 type using the shifted-pixel layout is employed as an IT-CCD for an electronic still camera, the pixel pitch is about 2.8 micrometers (xcexcm) in the row direction DH. When a 200-million-pixel IT-CCD of 1/3 type using the shifted-pixel layout is used as an IT-CCD for an electronic still camera, the pixel pitch is about 2.1 xcexcm in the row direction DH.
In many cases, vertical transfer CCDs are driven by four-phase signals and horizontal transfer CCDs are driven by two-phase signals.
In an IT-CCD including vertical transfer CCDs using CCDs of four-phase drive type and a horizontal CCD using CCD of two-phase drive type, it is relatively easy to form pixels with 2.1-xcexcm pitch in the row direction DH. However, the horizontal transfer CCD of the IT-CCD includes four electrodes for each pixel column. That is, four transfer electrodes are formed in a 2.1-xcexcm long region. Each transfer electrode has a width of about 0.5 xcexcm in this case.
Therefore, to produce an IT-CCD having the horizontal transfer CCD, although the chip size can be minimized, highly sophisticated ultra fine patterning techniques are necessary.
Since the horizontal transfer CCD has four transfer electrodes for each pixel column, each pulse supply terminal to supply driving pulses to the horizontal transfer CCD has large load electrostatic capacity.
In a high-resolution IT-CCD with 200 million pixels or more, to increase the readout frame frequency, the horizontal transfer CCD is to be driven by high-speed driving pulses of about 20 MHz in ordinary cases.
This resultantly increases the consumption power of the horizontal transfer CCD to, for example, about several tens of mill watts (mW). Therefore, in an electronic still camera with batteries loaded thereon, the large power consumption shortens the life of batteries.
It is therefore an object of the present invention to provide an IT-CCD and a method of driving the same in which the pixel density can be easily increased using ordinary fine patterning technique and the increase in the consumption power can be readily suppressed.
According to one aspect of the present invention, there is provided a solid-state image pickup device, comprising: a semiconductor substrate; a light sensing section defined on a surface of said semiconductor substrate; a large number of photoelectric converter elements formed in said light sensing section in a plurality of rows and in a plurality of columns; a charge transfer channel formed for each said photoelectric converter element column adjacent thereto on the surface of said semiconductor substrate, said charge transfer channel intersecting said light sensing section in a predetermined direction in a plan view; a plurality of transfer electrodes formed on said light sensing section, each said transfer electrode including a plurality of transfer path forming sections equal in number to said charge transfer channels, each said transfer path forming section intersecting an associated one of said charge transfer channels in a plan view, each intersection thereof constituting one charge transfer stage together with said associated charge transfer channel; a plurality of joining channels, each said joining channel being formed in the surface of said semiconductor substrate for each set of a plurality of said charge transfer channels, each said joining channel combining the set of said charge transfer channels with each other in a region outside said light sensing section; and a joining channel transfer electrode formed on the surface of said semiconductor substrate in the region outside said light sensing section, said joining channel transfer electrode intersecting each said joining channel in a plan view, each said intersection thereof constituting one joining charge transfer stage together with said each joining channel.
According to another aspect of the present invention, there is provided a driving method of a solid-state image pickup device comprising: a semiconductor substrate; a light sensing section defined on a surface of said semiconductor substrate; a large number of photoelectric converter elements formed in said light sensing section in a plurality of rows and in a plurality of columns; a charge transfer channel formed for each said photoelectric converter element column adjacent thereto on the surface of said semiconductor substrate, said charge transfer channel intersecting said light sensing section in a predetermined direction in a plan view; a plurality of transfer electrodes formed on said light sensing section, each said transfer electrode including a plurality of transfer path forming sections equal in number to said charge transfer channels, each said transfer path forming section intersecting an associated one of said charge transfer channels in a plan view, each intersection thereof constituting one charge transfer stage together with said associated charge transfer channel; a plurality of joining channels, each said joining channel being formed in the surface of said semiconductor substrate for each set of a plurality of said charge transfer channels, each said joining channel combining the set of said charge transfer channels with each other in a region outside said light sensing section; and a joining channel transfer electrode formed on the surface of said semiconductor substrate in the region outside said light sensing section, said joining channel transfer electrode intersecting each said joining channel in a plan view, each said intersection thereof constituting one joining charge transfer stage together with said each joining channel, the driving method comprising the steps of: a signal charge readout step of reading out, during one vertical blanking period, signal charge accumulated in each photoelectric converter element constituting a predetermined photoelectric converter element row or column, via said readout gate contiguous to said photoelectric converter element and feeding the signal charge to said charge transfer channel contiguous to said readout gate; and an image signal output step of converting, during a period from said one vertical blanking period to a one vertical blanking period subsequent thereto, each said signal charge read out to said charge transfer channel into an image signal and outputting the image signal.
In the solid-state image pickup device, a plurality of transfer electrodes are disposed so as to form charge transfer stages each including the same one charge transfer channel, the charge transfer stages being contiguous to each other. This resultantly forms one vertical transfer CCD in the light sensing section. The vertical transfer CCDs are formed as many as there are photoelectric converter columns formed in the light sensing section. In the solid-state image pickup device, the number of vertical transfer CCDs necessary to read signal charge from the photoelectric converters for the transfer thereof is therefore equal to that of the vertical transfer CCDs in the solid-state image pickup device of the prior art.
However, the solid-state image pickup device includes the joining channels. When the horizontal transfer CCD is disposed at a downstream position of the joining channels, the number of transfer electrodes of the horizontal transfer CCD can be reduced to half or less that of the solid-state image pickup device of the prior art.
It is therefore possible to produce, for example, a two-million-pixel solid-state image pickup device without narrowing the width of the transfer electrode in each charge transfer stage of the horizontal transfer CCD. This is, a high pixel density solid-state image pickup device having two million pixels can be produced using ordinary fine patterning technique.
Since the number of transfer electrodes to be formed in the horizontal transfer CCD can be reduced to about half that of the prior art, the increase in the load electrostatic capacity of each pulse supply terminal to supply driving pulses to the horizontal transfer CCD can be suppressed. It is therefore easy to suppress increase in the consumption power.
In this specification, movement of signal charge in a transfer path is regarded as a flow and hence a relative position of a member in such a stream is expressed, for example, as xe2x80x9can upstream of the member Axe2x80x9d or xe2x80x9ca downstream of the member Axe2x80x9d when necessary.